1. Field of the Invention
The present invention relates to a vehicular electronic control apparatus that incorporates a microprocessor and is used for fuel supply control of a vehicle engine. In particular, the invention relates to a vehicular electronic control apparatus that is miniaturized and standardized by improving how to handle a lot of input and output signals as well as improved in safety.
2. Description of the Related Art
FIG. 14 is a block circuit diagram of a conventional vehicular electronic control apparatus.
In FIG. 14, reference numeral 1 denotes an ECU (engine control unit) formed on a single printed circuit board and reference numeral 2 denotes a large-sized LSI (integrated circuit part) of the ECU 1. The LSI 2 is configured in such a manner that a CPU (microprocessor) 3, a nonvolatile flash memory 4, a RAM 5, an input data selector 6, an A/D converter 7, an output latch memory 8, etc. are connected to each other. Reference numeral 9 denotes a power supply unit for supplying control power to the ECU 1; 10, a vehicle battery; 11, a power line that connects the vehicle battery 10 and the ECU 1; and 12, a power switch.
The ECU 1 operates being supplied with control power from the power supply unit 9 that is supplied with power by the vehicle battery 10 via the power line 11 and the power switch 12. Programs to be executed by the ECU 1, control constants for engine control, etc. are stored in the nonvolatile flash memory 4 in advance.
Reference numeral 13 denotes various sensor switches; 14, bleeder resistors; 15, series resistors; 16, parallel capacitors; 17, input resistors; 18, positive feedback resistors; and 19, comparators. Each of a lot of ON/OFF input signals coming from the various sensor switches 13 is supplied to the associated comparator 19 via the bleeder resistor 14 as a pull-up or pull-down resistor and the series resistor 15 and the parallel capacitor 16 which constitute a noise filter. The input resistor 17 and the positive feedback resistor 18 are connected to each comparator 19. If the voltage across a certain parallel capacitor 16 exceeds a reference voltage that is applied to the negative-side terminal of the associated comparator 19, the comparator 19 supplies a signal having a logical value xe2x80x9cHxe2x80x9d to the data selector 6.
When the voltage across a certain parallel capacitor 16 decreases, addition of a voltage that is fed back by the positive feedback resistor 18 occurs and hence the output voltage of the comparator 19 does not return to a logical value xe2x80x9cLxe2x80x9d until the voltage across the parallel capacitor 16 becomes lower than the reference voltage.
As described above, each comparator 19 has the function of a level judgment comparator including a hysteresis function. Outputs of the many comparators 19 are stored in the RAM 5 via the data selector 6 and a data bus 30.
The data selector 6, which handles inputs of 16 bits, for example, outputs signals to the data bus 30 when receiving a chip-select signal from the CPU 3. Actually a plurality of data selectors 6 are used because there exist tens of input points.
Reference numeral 20 denotes various analog sensors; 21, series resistors; and 22, parallel capacitors.
Each of a lot of analog signals coming from the various analog sensors 20 is supplied to the associated A/D converter 7 via the series resistor 21 and the parallel capacitor which constitute a noise filter. A digital output of an A/D converter 7 that has received a chip-select signal from the CPU 3 is stored in the RAM 5 via the data bus 30.
A control output of the CPU 3 is stored in the latch memory 8 via the data bus 30, and is used for driving an external load via the associated output transistor 23. Actually a plurality of latch memories 8 to accommodate a lot of control outputs. Control outputs are stored in a latch memory 8 that has been chip-selected by the CPU 3.
Reference numeral 24 denotes drive base resistors for the respective transistors 23; 25, stabilization resistors each of which is connected between the base and the emitter of the associated transistor 23; 26, external loads; and 27, a power relay for supplying power to the external loads 26.
The conventional apparatus having the above configuration has the following problems. The LSI 2 has a large scale because the CPU 3 handles a very large number of inputs and outputs. The parallel capacitors 16 and 22 which constitute noise filters need to have various capacitance values to obtain desired filter constants, and hence it is difficult to standardize the parallel capacitors 16 and 22. A large capacitor is needed to obtain a large filter constant, which is a factor of increasing the size of the ECU 1.
Among measures for decreasing the size of the LSI 2 by decreasing the number of input and output terminals is a method of exchanging a lot of input and output signals in a time-divisional manner using a serial communication block as disclosed in Japanese Patent Laid-Open No. 13912/1995 (title: Input/output processing IC).
However, this method requires noise filters having various capacitance values and hence is not suitable for standardization of an apparatus. Further, this method is not suitable for miniaturization of an apparatus either because large capacitance values are needed to obtain sufficiently large filter constants.
On the other hand, a concept is known that a digital filter is used as a noise filter for an on/off input signal and its filter constant is controlled by a microprocessor.
For example, Japanese Patent Laid-Open No. 119811/1993 (title: Programmable controller) discloses a method in which if sampled input logical values of an external input signal have the same value plural times that value is employed and stored in an input image memory, and in which a filter constant changing instruction capable of changing the sampling period is provided.
Although this method has an advantage that the filter constant can be changed freely, the microcomputer is caused to bear a heavy load when a lot of input signals need to be processed. As a result, the response speeds of control operations of the microprocessor lower though the control operations are primary operations of the microprocessor.
Japanese Patent Laid-Open No. 2000-89974 (title: Data storage control device) also discloses a digital filter for an on/off signal. A shift register is provided as hardware and sampling processing is performed according to the same concept as described above.
Japanese Patent Laid-Open No. 83301/1997 (title: Switched capacitor filter) discloses a digital filter using a switched capacitor which serves as a noise filter for multi-channel analog input signals.
Also in this case, the microcomputer is caused to bear a heavy load when a lot of analog input signals need to be processed. As a result, the response speeds of control operations of the microprocessor becomes even lower though the control operations are primary operations of the microprocessor.
Japanese Patent Laid-Open No. 305681/1996 (title: Microcomputer) discloses a filter in which the filter constant is changed by switching, in multiple steps, the resistor of an analog filter that consists of a resistor and a capacitor. Japanese Patent Laid-Open No. 2000-68833 (title: Digital filter system) discloses a moving average type digital filter in which the arithmetic mean value of a plurality of time-series sampling data is employed as data of current time after analog values are converted into digital values.
Various known techniques relating to watching for a runaway and reactivation control of a microprocessor that should be pointed out in connection with the invention are as follows.
Japanese Patent Laid-Open No. 196003/1995 (title: Control system of vehicular safety device) discloses the following. An AND circuit is provided in a driving circuit of a vehicular safety device that is drive-controlled by a microcomputer. The vehicular safety device such as an airbag is driven based on the AND of an output of a judgment circuit that an activation permission signal when a watchdog pulse of the microcomputer is normal and an activation instruction signal of the microcomputer. This technique has a problem that when the microcomputer has been reactivated by a reset pulse, the vehicle driver cannot recognize a temporary runaway of the microcomputer.
Japanese Patent Laid-Open No. 81222/1993 (title: Operation monitoring method of two CPUs) discloses the following. In a system including two CPUs, that is, a main CPU and a sub-CPU, when the main CPU has run away or gone out of order, both CPUs are initialized and reactivated by a rest signal that is output from an externally provided watchdog timer circuit. When the sub-CPU has run away or gone out of order, the main CPU detects it and outputs a reset signal to the sub-CPU to initialize and reactivate the sub-CPU. This technique also has a problem that when the microcomputer has been reactivated by a reset pulse, the vehicle driver cannot recognize a temporary runaway of the microcomputer.
On the other hand, Japanese Patent Laid-Open No. 339308/1996 (title: Digital processing device) discloses the following. A microcomputer is completely stopped when a watchdog timer has detected an abnormality of the microcomputer. A system is so configured that to recover the microcomputer it is necessary to stop the supply of operation power to the microcomputer and then restart supply of operation power.
This technique has an advantage that the vehicle driver can recognize an abnormality of the microcomputer because the microcomputer cannot be reactivated unless the power switch is opened and then closed.
As understood from the above description, the above conventional techniques are partial miniaturization and standardization techniques and no full-scale miniaturization and standardization has not been attained by unifying those techniques.
In particular, there remains a problem that the control capabilities and the response speeds of a microcomputer as its primary capabilities necessarily lower in an attempt to miniaturize and standardize an input/output circuit section of the microprocessor.
In addition, where an ancillary integrated circuit device is added to a core integrated circuit device including a microcomputer, a sufficient safety measure should be taken against erroneous operation etc. of the microprocessor due to occurrence of noise.
A first object of the present invention is to provide a vehicular electronic control apparatus in which an external integrated circuit device is used to standardize a microprocessor in the case where the number of input and output points varies, and which can increase the response speed of input/output processing and improve the safety from a noise-induced erroneous operation of the microprocessor.
A second object of the invention is to provide a vehicular electronic control apparatus which can not only accommodate a variation in the number of input and output points but also attain its miniaturization and standardization by improving input filter sections.
The invention provides a vehicular electronic control apparatus including a core integrated circuit device, a first ancillary integrated circuit device, and a second ancillary integrated circuit device.
The core integrated circuit device includes a microprocessor,
the first ancillary integrated circuit device for receiving low-speed digital signals is connected to the core integrated circuit device in such manner that serial communication is performed with each other and
the second ancillary integrated circuit device for receiving analog signals is connected to the core integrated circuit device in such manner that serial communication is performed with each other.
The core integrated circuit device further includes:
a direct parallel input circuit and a direct parallel output circuit for inputting and outputting signals from and to control object devices,
a first parent station serial/parallel converter and a second parent station serial/parallel converter,
a first nonvolatile memory to which control programs that serve to control the control object devices are written from an external tool, and
a first RAM for computation, and
the microprocessor of the core integrated circuit device to which the direct parallel input circuit, the direct parallel output circuit, the first and second parent station serial/parallel converters, the first nonvolatile memory, and the first RAM are bus-connected.
The first ancillary integrated circuit device includes:
a first child station serial/parallel converter connected to the first parent serial/parallel converter of the core integrated circuit device in such a manner that serial communication is performed with each other, and
an indirect parallel input circuit for receiving the low-speed digital signals in parallel, and
the first ancillary integrated circuit device outputs the digital signals received by the indirect parallel input circuit to the core integrated circuit device through the first child station serial/parallel converter.
The second ancillary integrated circuit device includes:
a second child station serial/parallel converter connected to the core integrated circuit device in such a manner that serial communication is performed with each other, and
a multi-channel analog-to-digital converter for receiving the analog signals parallel and for converting the received analog signals into digital signals, and
the second ancillary integrated circuit device outputs the digital signals converted by the multi-channel analog-to-digital converter to the core integrated circuit device through the second child station serial/parallel converter.
And the core integrated circuit device generates control signals based on the input signals received from the control object devices, the digital signals received from the first ancillary integrated circuit device, and the digital signals received from the second ancillary integrated circuit device, and outputs the generated control signals to the control object devices.
According to the vehicular electronic control apparatus of the invention, not only can the core integrated circuit device be standardized even in the case where the number of control input and output points varies with control object devices, but also the speed of exchange of input and output information can be increased by decreasing the degree of congestion of communication lines by means of the double serial communication lines that are separated into the analog system and the digital system. This makes it possible to attain high operation speeds, high performance, and an increased degree of multi-functionality.